It is well-known that there exists an ongoing need to miniaturize the footprint of integrated circuits (ICs), whilst at the same time increasing the complexity of such ICs. In other words, there exists a need to integrate more components per available unit area. This is of course far from trivial, especially since components such as transistors can influence each other when placed in close vicinity to each other in an active substrate of the die. Such interference is of course highly unwanted. To prevent such interference from occurring, active components in an IC die are typically laterally electrically insulated from each other by isolation regions such as LOCOS (local oxidation of silicon) or STI (shallow trench isolation) regions.
As will be apparent, the inclusion of such isolation regions further complicates increasing the component density. For this reason, the isolation regions have been used as carriers or substrates of (passive) components, e.g. high-voltage resistors, which do not require the use of the active substrate, with the isolation region providing the necessary electrical insulation from the active substrate. A prime example of such a passive component on top of the isolation structure is a polysilicon resistor, the characteristics of which are described in detail in chapter 11.2 of “Device modeling for analog and RF CMOS circuit design” by Trond Ytterdal et. al, published in 2003 by John Wiley and Sons Ltd., Chichester, England.
However, it has been found that the present inventors that the inclusion of passive components such as a polysilicon resistor on an isolation structure in the active substrate can increase the number of die failures.